555 Timer IC – Basics and Working principle explained


let’s start with a brief intro of the
IC. 555 timer IC is the most popular IC ever manufactured. it was introduced in 1972 by signetics corporation it is usually described as a
highly stable device for generation of accurate time delays and oscillations. some of its major applications include precision timing pulse generation time
delay generation and pulse width modulation it can be operated in one out
of the two modes morestable or astable understanding the working of the
internal circuit at transistor level will be very difficult so we will be
looking at the block diagram representation of the 555 timer
IC’s internal circuit. let’s start with the block diagram representation of the IC. The IC is a 8 pin IC with its 8th pin connected to the power
supply of the circuit. then we have three resisters connected between the VCC and
the ground pin ground. Ground is pin 1 of the IC. The value of the three resistors is
5KOhm each and this gives the IC it’s traditional name 555. 2 comparators are connected with the negative of first comparator connected
between the two resistors and positive taken out as threshold pin or pin number 6 of the IC. the second comparator’s positive pin is connected between the
two resistors and the negative pin is taken out as the trigger pin or pin
number 2 of the IC. The negative terminal of the first comparator is also
taken out of the IC as control pin which is pin number 5. The output of the two
comparators are connected to the input terminals of the RS flip-flop and the
reset pin of the flip-flop is taken out of the IC as pin number 4. the output of the flip-flop is taken out as pin 3 of the IC passing through an
output stage. The complementary output of the flip-flop is connected through a
100 ohm resistor to the base of transistor Q1. The emitter of the
transistor Q1 is connected to the ground and the
collector is taken out of the IC as discharge pin or pin number 7. the 3 resistors form a voltage divider and are used to set the reference
voltages for the two comparators. (2*VCC)/3 set as the reference voltage
for the first comparator and VCC/3 for the second comparator. Control
pin can also be used to externally set the reference voltage for the comparator 1
but it is generally not used so we short it to the ground using a 0.01uF capacitor. now let’s start with the working of the IC consider the
first case when the input to 555 such that the threshold voltage is
greater than (2*VCC)/3 and the trigger voltage is greater than VCC/3. input to the positive terminal is greater than the voltage reference set
at the negative terminal of the comparator therefore its output is logic
high. Similarly, the voltage at trigger pin is greater than the VCC/3
voltage set at the positive terminal of the comparator, thus the output is logic
low. Before moving on further first let’s look at the truth table of SR flip-flop
when s and R both the inputs are zero the output remains same as the previous
state. when the reset is 1 the output is reset when the set is 1 the output is
set when both the inputs are 1 then it reaches into a not defined state. the reset is 1 and set is 0 so it is this case where output is 0. So we have output
as logic 0 and Q Bar as 1. When Q Bar is one it sets the Q1 transistor into
saturation and thus leads to a short circuit between 7th pin and the ground
pin now let us look into the second case
when the threshold voltage is less than (2*VCC)/3 and the trigger voltage
is less than VCC/3. For this case the output of comparator one is logic
zero as a threshold voltage is lower than the reference voltage of (2*VCC)/3 and the output of comparator 2 is logic one as trigger voltage is lower
than VCC/ 3. 0 and 1 on the rs input leads to this case where the output is
logic 1 therefore the output of the 555 IC is logic 1 and the Q bar is
set to logic low. When Q Bar is 0 the Q 1 transistor is in cutoff and
this leads to an open circuit between the 7th pin and the ground pin. For the final case let us consider the threshold voltage to be less than (2*VCC)/3 and
the trigger voltage to be greater than VCC/3. for these two values the output
of the comparator 1 is logic 0 and the output of comparator 2 is also logic 0. When the input to the rs flip-flop are both logic 0 the output remains same
therefore the output of 555 IC is in memory state, I mean a state in which
the output remains same as the previous state. This completes part 1 of the
series in the next tutorial I will be talking about 555 in it’s Astable mode.

34 Replies to “555 Timer IC – Basics and Working principle explained

  1. Great initiative to start your first electronics tutorial series with the highly famous and robust IC 555. Keep it up. Waiting for more amazing tutorial ahead.

  2. Nothing helpful bcoj u need to explain why n which case our comprtr op 1 or 0
    Main logic is not explain
    How its works as a timer
    You just saying' let us consider case'
    Go practical n show how square wave genrate by this

  3. It seems there's no difference between a book reading and this lecture, is there difference between "reading & explaining" **

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